1. Field of the Invention
This invention relates generally to a voltage gated magnetic-random-access memory (VG-MRAM) cell, more particularly to methods of fabricating voltage-gated MRAM memory elements utilizing self-aligned process.
2. Description of the Related Art
In recent years, magnetic random access memories (hereinafter referred to as MRAMs) using the magnetoresistive effect of ferromagnetic tunnel junctions (also called MTJs) have been drawing increasing attention as the next-generation solid-state nonvolatile memories that can also cope with high-speed reading and writing. A ferromagnetic tunnel junction has a three-layer stack structure formed by stacking a recording layer having a changeable magnetization direction, an insulating tunnel barrier layer, and a fixed layer that is located on the opposite side from the recording layer and maintains a predetermined magnetization direction. Corresponding to the parallel and anti-parallel magnetic states between the recording layer magnetization and the reference layer magnetization, the magnetic memory element has low and high electrical resistance states, respectively. Accordingly, a detection of the resistance allows a magnetoresistive element to provide information stored in the magnetic memory device.
There has been a known technique for achieving a high MR ratio by forming a crystallization acceleration film that accelerates crystallization and is in contact with an interfacial magnetic film having an amorphous structure. As the crystallization acceleration film is formed, crystallization is accelerated from the tunnel barrier layer side, and the interfaces with the tunnel barrier layer and the interfacial magnetic film are matched to each other. By using this technique, a high MR ratio can be achieved.
Typically, MRAM devices are classified by different write methods. A traditional MRAM is a magnetic field-switched MRAM utilizing electric line currents to generate magnetic fields and switch the magnetization direction of the recording layer in a magnetoresistive element at their cross-point location during the programming write. A spin-transfer torque (or STT)-MRAM has a different write method utilizing electrons' spin momentum transfer. Specifically, the angular momentum of the spin-polarized electrons is transmitted to the electrons in the magnetic material serving as the magnetic recording layer. According to this method, the magnetization direction of a recording layer is reversed by applying a spin-polarized current to the magnetoresistive element. As the volume of the magnetic layer forming the recording layer is smaller, the injected spin-polarized current to write or switch can be also smaller.
Besides a write current, the stability of the magnetic orientation in a MRAM cell as another critical parameter has to be kept high enough for a good data retention, and is typically characterized by the so-called thermal factor which is proportional to the energy barrier as well as the volume of the recording layer cell size.
To record information or change resistance state, typically a recording current is provided by its CMOS transistor to flow in the stacked direction of the magnetoresistive element, which is hereinafter referred to as a “vertical spin-transfer method.” Generally, constant-voltage recording is performed when recording is performed in a memory device accompanied by a resistance change. In a STT-MRAM, the majority of the applied voltage is acting on a thin oxide layer (tunnel barrier layer) which is about 10 angstroms thick, and, if an excessive voltage is applied, the tunnel barrier breaks down. More, even when the tunnel barrier does not immediately break down, if recording operations are repeated, the element may still become nonfunctional such that the resistance value changes (decreases) and information readout errors increase, making the element un-recordable. Furthermore, recording is not performed unless a sufficient voltage or sufficient spin current is applied. Accordingly, problems with insufficient recording arise before possible tunnel barrier breaks down.
In the mean time, since the switching current requirements reduce with decreasing MTJ element dimensions, STT-MRAM has the potential to scale nicely at even the most advanced technology nodes. However, patterning of small MTJ element leads to increasing variability in MTJ resistance and sustaining relatively high switching current or recording voltage variation in a STT-MRAM.
Reading STT MRAM involves applying a voltage to the MTJ stack to discover whether the MTJ element states at high resistance or low. However, a relatively high voltage needs to be applied to the MTJ to correctly determine whether its resistance is high or low, and the current passed at this voltage leaves little difference between the read-voltage and the write-voltage. Any fluctuation in the electrical characteristics of individual MTJs at advanced technology nodes could cause what was intended as a read-current, to have the effect of a write-current, thus reversing the direction of magnetization of the recording layer in MTJ.
Above issues or problems are all associated with the traditional two-terminal MRAM configuration. Thus, it is desirable to provide STT-MRAM structures and methods that realize highly-accurate reading, highly-reliable recording and low power consumption while suppressing destruction and reduction of life of MTJ memory device due to recording in a nonvolatile memory that performs recording resistance changes, and maintaining a high thermal factor for a good data retention.